STEP 2: Basic STA Equations (Very Important)
This step explains the mathematical foundation of Static Timing Analysis. All STA tools are built on a small set of timing equations. These equations are applied repeatedly to every timing path in the design under different conditions. Understanding these equations clearly is critical, because every timing report, slack value, and violation directly comes from them.
Purpose of Basic STA Equations
The purpose of STA equations is to verify whether data launched from a source reaches its destination within the allowed time window defined by the clock and the receiving element. STA does not simulate signal transitions; instead, it compares two values for every timing path: when the data arrives and when the data is required to arrive.
These comparisons are expressed using setup and hold equations.
Data Arrival Time
Data arrival time is the actual time at which data reaches the endpoint of a timing path. It represents how long the data takes to propagate from the start point to the end point.
Data arrival time includes the following components:
- Clock arrival time at the launching element
- Clock-to-Q delay of the launching flip-flop
- Combinational logic delay
- Interconnect or wire delay
In simple terms, data arrival time answers the question: at what time does valid data reach the destination?
Data Required Time
Data required time is the latest or earliest time by which data must arrive at the endpoint to meet timing requirements. It is derived from the clock timing and the timing requirements of the capturing element.
For setup checks, data required time represents the latest allowed arrival time.
For hold checks, data required time represents the earliest allowed arrival time.
Data required time answers the question: by what time must the data arrive to be safely captured?
Setup Check
The setup check ensures that data arrives early enough at the capturing element before the active clock edge.
The setup condition is expressed as:
Data Arrival Time ≤ Data Required Time
In setup analysis, the data required time is calculated based on the capture clock edge minus the setup time of the capturing flip-flop. If the data arrives later than this required time, the flip-flop does not have sufficient time to capture the correct value.
Setup checks are concerned with slow data paths. These paths have large combinational delay and are analyzed using maximum delay values. The worst-case delay is considered to ensure correct operation under slow process, low voltage, and high temperature conditions.
Hold Check
The hold check ensures that data does not arrive too early at the capturing element.
The hold condition is expressed as:
Data Arrival Time ≥ Data Required Time
In hold analysis, the data required time is calculated based on the capture clock edge plus the hold time of the capturing flip-flop. If the data arrives earlier than this required time, it may overwrite the previously captured value.
Hold checks are concerned with fast data paths. These paths have very small combinational delay and are analyzed using minimum delay values. The best-case delay is considered to ensure correct operation under fast process, high voltage, and low temperature conditions.
Slack Calculation
Slack is the numerical margin by which a timing path meets or fails its timing requirement. Slack is calculated as the difference between data required time and data arrival time.
For setup timing, slack is calculated as:
Slack = Data Required Time − Data Arrival Time
For hold timing, slack is calculated as:
Slack = Data Arrival Time − Data Required Time
Slack indicates how much extra time is available or how much timing is violated for a given path.
Positive Slack
Positive slack means that the timing requirement is satisfied. The data arrives within the allowed timing window. A larger positive slack indicates more timing margin and a safer design.
For setup timing, positive slack means data arrives earlier than required.
For hold timing, positive slack means data arrives later than the minimum required time.
Negative Slack
Negative slack means that the timing requirement is violated. The data arrives either too late or too early.
For setup timing, negative slack means data arrives after the required time.
For hold timing, negative slack means data arrives before the required time.
Negative slack indicates that the design will fail timing under the analyzed conditions and must be fixed.
Why Setup Uses Maximum Delay
Setup timing checks use maximum delay because setup violations occur when data is too slow. The worst-case delay scenario must be analyzed to ensure that even under slow conditions, data can still arrive before the capture clock edge.
Maximum delay includes:
- Slow cell delays
- Large wire delays
- Worst-case process, voltage, and temperature conditions
By analyzing maximum delay, STA guarantees correct operation in the slowest possible scenario.
Why Hold Uses Minimum Delay
Hold timing checks use minimum delay because hold violations occur when data is too fast. The best-case delay scenario must be analyzed to ensure that data does not reach the capturing element too quickly.
Minimum delay includes:
- Fast cell delays
- Small wire delays
- Best-case process, voltage, and temperature conditions
By analyzing minimum delay, STA guarantees correct operation in the fastest possible scenario.
Manual Slack Calculation Concept
To manually calculate setup or hold slack for a simple path, one must:
- Identify the launch clock time
- Add clock-to-Q delay
- Add combinational and wire delays to get data arrival time
- Calculate data required time using clock timing and setup or hold requirement
- Subtract arrival and required times appropriately to obtain slack
This manual calculation mirrors exactly what STA tools perform automatically for every timing path.